Line Widths for Various Characteristic Impedances of Center Stripline Devices in RT-Duroid Laminates
Stripline devices embedded in RT-duroid laminates are widely used for high-frequency circuits due to their excellent dielectric and thermal properties. Calculating the correct line width for a specific characteristic impedance (Z0Z_0Z0) is essential for optimal signal integrity and impedance matching.
1. Design Parameters
The characteristic impedance of a center stripline is influenced by several factors:
- Substrate Thickness (hhh): Distance between the signal line and the ground planes.
- Dielectric Constant (ϵr\epsilon_rϵr): Affects the speed of the signal propagation and capacitance.
- Conductor Width (www): Determines the inductance and capacitance per unit length.
- Conductor Thickness (ttt): Influences the effective width due to edge effects.
2. General Formula for Stripline Impedance
The characteristic impedance of a symmetric stripline is approximately given by:Z0=30πϵrln(4hw+t)Z_0 = \frac{30\pi}{\sqrt{\epsilon_r}} \ln\left(\frac{4h}{w+t}\right)Z0=ϵr30πln(w+t4h)
Where:
- hhh: Half the distance between the ground planes.
- www: Conductor width.
- ttt: Conductor thickness.
- ϵr\epsilon_rϵr: Relative permittivity of the substrate.
For practical designs:
- Edge effects can modify the effective width weff=w+Δww_\text{eff} = w + \Delta wweff=w+Δw, where Δw\Delta wΔw accounts for fringing fields, typically small for thick conductors.
3. Typical Line Widths for RT-Duroid Laminates
Below are example calculations for RT-duroid 5880 (ϵr=2.2\epsilon_r = 2.2ϵr=2.2) at different impedances and substrate thicknesses.
3.1 Parameters for Calculations:
- Dielectric Constant: ϵr=2.2\epsilon_r = 2.2ϵr=2.2 (RT-duroid 5880).
- Substrate Thickness (2h2h2h): 20 mil (0.508 mm) and 62 mil (1.575 mm).
- Conductor Thickness (ttt): 1 mil (0.0254 mm).
| Z0Z_0Z0 (Ω) | Substrate Thickness (2h2h2h) | Line Width (www) (mil) |
|---|---|---|
| 50 | 20 mil | ~7.5 |
| 50 | 62 mil | ~23.0 |
| 75 | 20 mil | ~4.3 |
| 75 | 62 mil | ~14.0 |
| 100 | 20 mil | ~3.0 |
| 100 | 62 mil | ~9.5 |
3.2 Observations:
- Wider lines are required for lower impedances to increase capacitance.
- Thicker substrates (larger 2h2h2h) reduce capacitance per unit length, requiring narrower lines for a given Z0Z_0Z0.
4. Design Considerations
4.1 High-Frequency Effects:
- At GHz frequencies, surface roughness and skin effect can impact impedance. Use rolled copper or smooth surface finishes to mitigate these issues.
4.2 Tight Tolerances:
- Use precise PCB fabrication techniques to ensure line width consistency, as small deviations can lead to significant impedance mismatches.
4.3 Multilayer PCBs:
- For multilayer designs, carefully account for dielectric thickness and variations between layers.
5. Tools for Impedance Calculation
Several software tools and calculators are available to refine these estimates:
- Keysight ADS and Ansys HFSS: For full electromagnetic simulation.
- Polar Si9000: Industry-standard impedance calculator for PCB design.
