Software Rule Settings

To begin with, enter Design > Rules and adjust the options based on design requirements:

1. Safety Spacing Settings:
   • In PROTEL99SE, the Clearance Constraint under Routing defines the necessary spacing between traces, pads, and vias of different networks.
     • Single/Double-sided boards: Set spacing to 10-12mil.
     • Multi-layer boards (four layers or more): Set spacing to 6-8mil.
2. Routing Layer and Direction:
   • Go to Routing Layers under Routing and set the desired routing layer and direction.
   • For SMD single-sided boards, use only the Top Layer, and for plug-in boards, use only the Bottom Layer.
3. Via Settings:
   • Adjust the Routing Via Style to set the inner and outer diameters of vias.
     • Single/Double-sided boards: Outer diameter: 40-60mil, Inner diameter: 20-30mil.
     • Multi-layer boards: Outer diameter: 20-40mil, Inner diameter: 10-20mil.
4. Line Width Options:
   • The Width Constraint specifies trace width.
     • For single/double-sided boards, set between 10-30mil.
     • For power and ground lines, prefer 60mil (no maximum limit, but minimum of 8mil).
5. Copper Connection:
   • Set Polygon Connect Style under Manufacturing to Relief Connect with a conductor width of 25mil and 4 conductors at a 90-degree angle.
6. Physical Aperture Settings:
7. Use Hole Size Constraint to define physical hole sizes, setting a minimum of 20mil.

Software Parameter Settings

1. Visible Grid Options:
   • Go to Design > Options > Layer and select the relevant options like Top Solder, Top Overlay, and Multi Layer.
   • Set Visible Grid to 10mil for the top layer and 100mil for the bottom layer.
2. Snap and Device Movement Grids:
   • Under Design > Options > Options, set the snap and device movement grids to 10mil and select Electrical Grid with a range of 8mil.

Design Rule Check (DRC) Settings

Enter Tools > Design Rules Check, and set the following:

• Clearance Constraints, Max/Min Width, Short Circuit, and Un-Routed Net Constraints under Routing Rules.
• Ensure Max/Min Hole Size is checked under Manufacturing Rules.

Adding the Device Library

Retrieve components from the corresponding component library based on the PCB schematic.

Importing the Netlist

Ensure that the netlist import has no errors. It’s crucial to avoid design work if the netlist contains errors. Define the PCB size and lock the components once the positioning holes are finalized.

Component Layout Guidelines

When arranging components:

• Ensure the layout is neat, symmetrical, and has an appropriate density.
• Maintain electrical integrity and facilitate easier routing by organizing components into functional modules.
• The layout should be aesthetically pleasing and easy to adjust for heat dissipation and signal flow.

PCB Wiring Strategy

Adopt automatic routing with manual adjustments:

• Wire in the order of ground, power, clock, and other lines.
• Manual routing is essential for complex boards to account for electrical characteristics and minimize interference.

Silk Screen and Text Placement

1. Product Name, Model, and Logo: Ensure these are clearly visible.
2. Component Labels: Place component numbers in an organized manner.
3. Test Hooks and Test Holes: Clearly label for ease of testing.

Copper Pour and Ground Plane

Use Place > Polygon Plane to connect copper areas to ground. Adjust grid size to 18mil, track width to 20mil, and select the relevant layer. For areas that should not contain routing, place a FILL layer.

Final Design Rule Check (DRC)

Perform a final DRC check after wiring, ensuring there are no errors before finalizing the design.

MID Technology in PCB Manufacturing

Molded Interconnect Devices (MID) technology allows for 3D PCBs, eliminating the need for traditional flat boards. This innovation opens new design possibilities by integrating circuits directly into the structure of molded plastic components.

PCB Assembly Technology Overview

CSP is pushing PCB technology into a nano-era, increasing packaging efficiency and performance.

Through-Hole Technology (THT):

Focus on metallized holes for electrical interconnection and support.

Surface Mount Technology (SMT):

Vias are reduced in size, enabling higher density and improved reliability.

Chip-Scale Packaging (CSP):

KKPCB provides global customers with one-stop services from PCB layout, prototype PCB proofing, PCB manufacturing, PCBA processing (including SMT and DIP), PCBA testing, PCBA product assembly and outbound packaging. You could provide a Gerber file or BOM list to us, we will offer the finished PCB products or PCB assembly which are satisfied with you.