With the development of electronic information technology, multi-layer PCBs are used in more and more fields. Traditionally, we define PCBs with more than four layers as “multi-layer PCBs” and PCBs with more than ten layers as “high-layer PCBs”. Whether or not a PCB manufacturer can produce high-layer PCBs is an important indicator of its strength. A PCB manufacturer that can produce high-layer PCBs with more than twenty layers is considered to be a PCB company with outstanding technical strength.

　　Why is it so difficult to make multilayer PCB circuit boards?

　　1. Main production difficulties: Compared with conventional circuit boards, high-layer circuit boards are thicker, have more layers, denser lines and vias, larger unit sizes, thinner dielectric layers, etc., and have more stringent requirements on inner layer space, interlayer alignment, impedance control, and reliability.

　　1. Difficulty in interlayer alignment: Due to the large number of layers in high-layer boards, customer design requirements for the alignment of each layer of the PCB are becoming increasingly stringent. Usually, the interlayer alignment tolerance is controlled at ±75μm. Considering the large unit size design of the high-layer board, the temperature and humidity of the graphic transfer workshop, and the misalignment caused by the inconsistency of the expansion and contraction of different core board layers, the interlayer positioning method and other factors make the interlayer alignment control of the high-layer board more difficult.

　　2. Difficulties in inner circuit production: High-layer boards use special materials such as high TG, high speed, high frequency, thick copper, and thin dielectric layers, which puts high demands on inner circuit production and graphic size control. The line width and line spacing are small, the number of open short circuits and micro short circuits increases, and the qualified rate is low; there are more fine circuit signal layers, and the probability of inner layer AOI missing inspection increases; the thickness of the inner core board is thin, it is easy to wrinkle and cause poor exposure, and it is easy to roll up when etching; the cost of scrapping the finished product is relatively high.

　　3. Difficulties in lamination: When multiple inner core boards and prepregs are superimposed, defects such as sliding plates, delamination, resin voids and residual bubbles are easily produced during lamination. When designing the laminated structure, the heat resistance, voltage resistance, glue filling amount and dielectric thickness of the material must be fully considered, and a reasonable lamination procedure for high-layer boards must be set.

　　4. Difficulties in drilling: The use of special plates with high TG, high speed, high frequency and thick copper increases the difficulty of drilling roughness, drilling burrs and removing drilling dirt. The number of layers is large, the total copper thickness and plate thickness are accumulated, and the drilling tool is easy to break; there are many dense BGAs and the narrow hole wall spacing causes CAF failure problems; the plate thickness easily leads to oblique drilling problems.

　　2. Main production difficulties

　　1. Material selection: The electronic circuit material is required to have a relatively low dielectric constant and dielectric loss, as well as low CTE, low water absorption and better high-performance copper clad laminate materials to meet the processing and reliability requirements of high-layer boards.

　　2. Design of laminated structure: The main factors to be considered in the laminated structure design are the heat resistance, voltage resistance, glue filling amount and dielectric layer thickness of the material. The following main principles should be followed:

　　The prepreg and core board manufacturers must be consistent. To ensure PCB reliability, avoid using a single 1080 or 106 prepreg for all layers of prepreg (unless the customer has special requirements). If the customer has no requirements for dielectric thickness, the dielectric thickness between each layer must be guaranteed to be ≥0.09mm according to IPC-A-600G.

　　When customers require high TG boards, both the core board and the prepreg must use corresponding high TG materials.

　　For inner substrates of 3OZ or above, select prepregs with high resin content, but try to avoid structural designs that use only 106 high-resin prepregs.

　　If the customer has no special requirements, the thickness tolerance of the interlayer dielectric layer is generally controlled at +/-10%. For the impedance board, the dielectric thickness tolerance is controlled according to the IPC-4101 C/M grade tolerance. If the impedance influencing factor is related to the substrate thickness, the board tolerance must also be controlled according to the IPC-4101 C/M grade tolerance.

　　3. Inter-layer alignment control: The accuracy of the inner core board size compensation and production size control requires the data collected in production over a certain period of time and historical data experience to accurately compensate for the graphic dimensions of each layer of the high-layer board to ensure the consistency of the expansion and contraction of each layer of the core board.

　　4. Inner layer circuit process: Since the resolution capability of traditional exposure machines is about 50μm, for the production of high-layer boards, laser direct imaging machines (LDI) can be introduced to improve the graphics resolution capability to about 20μm. The alignment accuracy of traditional exposure machines is ±25μm, and the inter-layer alignment accuracy is greater than 50μm; with high-precision alignment exposure machines, the graphics alignment accuracy can be improved to about 15μm, and the inter-layer alignment accuracy can be controlled within 30μm.

　　5. Lamination process: At present, the interlayer positioning methods before lamination mainly include: four-slot positioning (Pin LAM), hot melt, rivets, and a combination of hot melt and rivets. Different product structures use different positioning methods. For high-rise boards, four-slot positioning is adopted, or fusion + riveting is used. The OPE punching machine punches out the positioning holes, and the punching accuracy is controlled at ±25μm. According to the laminated structure of the high-rise board and the materials used, the appropriate lamination procedure is studied, the optimal heating rate and curve are set, the heating rate of the laminated sheet is appropriately reduced, and the high-temperature curing time is extended to allow the resin to fully flow and solidify, and avoid problems such as sliding plates and interlayer dislocation during lamination.

　　6. Drilling process: Due to the superposition of layers, the board and copper layer are too thick, which causes serious wear on the drill bit and is easy to break the drill bit. The number of holes, drop speed and rotation speed should be appropriately adjusted down. Accurately measure the expansion and contraction of the board and provide accurate coefficients; the number of layers ≥ 14, the hole diameter ≤ 0.2mm or the hole-to-line distance ≤ 0.175mm, and use a drilling rig with a hole position accuracy of ≤ 0.025mm for production; the hole diameter above φ4.0mm is drilled in steps, and the thickness-to-diameter ratio of 12:1 is drilled in steps, and the forward and reverse drilling methods are used for production; the drilling flash and hole roughness are controlled. For high-layer boards, try to use new drills or ground drills, and the hole roughness is controlled within 25um.

KKPCB conducts research on special processing technologies such as ordinary double-sided boards, thick copper circuit boards, high-frequency circuit boards, HDI circuit boards, rigid-flexible circuit boards, FPC flexible boards, buried blind hole circuit boards, and IC carrier boards. Provides PCB design, PCB layout, PCB prototyping and PCB assembly services.